Exploiting Design Patterns to Automatically Parallelize Programs

Overview

Topic status: We're looking for students to study this topic.

Multi-core processors are now common place and the number of cores is expected to continue to increase exponentially. Unlike with previous processor improvements, compilers are generally unable to automatically exploit this parallel hardware. Parallel programming has long belonged to the specialized realm of high performance computing but is now a mainstream challenge; set to have a major impact on the software development industry. Parallelizing programs currently requires considerable specialized knowledge and skill, is time consuming and error prone. We need to develop better ways of expressing and analysing programs to make it easier to safely exploit parallel hardware. Design patterns have long been used, especially in object-oriented programs to help programmers create better designed and implemented applications. It is possible; however, that they could also be used to help compilers automatically parallelize programs. To do so, the programmer would need to somehow make explicit the fact that they are using a particular design pattern and assert any invariants that it presupposes. We could then manually analyze various design patterns and decide a priori which design patterns are amenable to parallelization and how that parallelization might be achieved most efficiently. A tool could then automatically transform any programs that were identified as using that design pattern by applying a parallelization template.

Hypothesis: That design patterns can be used to help dynamically parallelize programs.

Approaches: Firstly, we need some mechanism for making the application of a design pattern explicit in an implementation. This may be a programming language syntax extension or utilize existing language facilities for commenting or meta-data attribution. Then we'd need to analyse various existing (and perhaps novel) design patterns from a parallelization point of view, determine how to best parallelize them and develop a template mechanism for expressing the parallelization process. Finally we'd need to assess the effectiveness of these techniques by measuring parallelization efficiency.

References:

Study level
PhD
Supervisors
QUT
Organisational unit

Science and Engineering Faculty

Research area

Computer Science

Contact
Please contact the supervisor.